Files
ritz/tests/test_llvm_codegen_conditional.py
T
Aaron Sinclair 74ff1e7e9f Support multiple components in single file with scoped signals
- Update generate_llvm_ir() to accept list of component dicts
- Process each component with own signal/handler state
- Scope signal globals with component name prefix (@signal_ComponentName_signalName)
- Add _signal_global() helper for scoped signal names
- Update tests for scoped signal names
- All tests passing (30/30)
2025-11-15 03:32:38 -08:00

83 lines
1.8 KiB
Python

"""Tests for LLVM IR code generation with conditional rendering."""
import pytest
from ritz.parser import parse_component
from ritz.llvm_codegen_signals import generate_llvm_ir
def test_if_statement_codegen():
"""Test LLVM IR generation for if statement."""
source = """
from ritz.syntax import *
@component
def Toggle():
visible = signal(1)
if visible:
with P():
yield "I am visible!"
"""
ir = parse_component(source)
llvm_ir = generate_llvm_ir(ir)
# Should have signal global (scoped to component)
assert "@signal_Toggle_visible = global i32 1" in llvm_ir
# Should have conditional branch
assert "br i1" in llvm_ir
# Should have basic blocks for then/else/merge
assert "if.then." in llvm_ir
assert "if.end." in llvm_ir
def test_if_else_codegen():
"""Test LLVM IR generation for if/else."""
source = """
from ritz.syntax import *
@component
def Toggle():
visible = signal(1)
if visible:
with P():
yield "Shown"
else:
with P():
yield "Hidden"
"""
ir = parse_component(source)
llvm_ir = generate_llvm_ir(ir)
# Should have conditional branch
assert "br i1" in llvm_ir
# Should have both then and else blocks
assert "if.then." in llvm_ir
assert "if.else." in llvm_ir
def test_if_comparison_codegen():
"""Test LLVM IR generation for if with comparison."""
source = """
from ritz.syntax import *
@component
def Counter():
count = signal(0)
if count > 5:
with P():
yield "High count!"
"""
ir = parse_component(source)
llvm_ir = generate_llvm_ir(ir)
# Should have icmp instruction for comparison
assert "icmp" in llvm_ir
# Should have greater-than comparison (sgt = signed greater than)
assert "sgt" in llvm_ir or ">" in llvm_ir