- Update generate_llvm_ir() to accept list of component dicts - Process each component with own signal/handler state - Scope signal globals with component name prefix (@signal_ComponentName_signalName) - Add _signal_global() helper for scoped signal names - Update tests for scoped signal names - All tests passing (30/30)
83 lines
1.8 KiB
Python
83 lines
1.8 KiB
Python
"""Tests for LLVM IR code generation with conditional rendering."""
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import pytest
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from ritz.parser import parse_component
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from ritz.llvm_codegen_signals import generate_llvm_ir
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def test_if_statement_codegen():
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"""Test LLVM IR generation for if statement."""
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source = """
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from ritz.syntax import *
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@component
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def Toggle():
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visible = signal(1)
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if visible:
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with P():
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yield "I am visible!"
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"""
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ir = parse_component(source)
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llvm_ir = generate_llvm_ir(ir)
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# Should have signal global (scoped to component)
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assert "@signal_Toggle_visible = global i32 1" in llvm_ir
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# Should have conditional branch
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assert "br i1" in llvm_ir
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# Should have basic blocks for then/else/merge
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assert "if.then." in llvm_ir
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assert "if.end." in llvm_ir
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def test_if_else_codegen():
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"""Test LLVM IR generation for if/else."""
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source = """
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from ritz.syntax import *
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@component
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def Toggle():
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visible = signal(1)
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if visible:
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with P():
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yield "Shown"
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else:
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with P():
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yield "Hidden"
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"""
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ir = parse_component(source)
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llvm_ir = generate_llvm_ir(ir)
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# Should have conditional branch
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assert "br i1" in llvm_ir
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# Should have both then and else blocks
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assert "if.then." in llvm_ir
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assert "if.else." in llvm_ir
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def test_if_comparison_codegen():
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"""Test LLVM IR generation for if with comparison."""
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source = """
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from ritz.syntax import *
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@component
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def Counter():
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count = signal(0)
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if count > 5:
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with P():
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yield "High count!"
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"""
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ir = parse_component(source)
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llvm_ir = generate_llvm_ir(ir)
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# Should have icmp instruction for comparison
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assert "icmp" in llvm_ir
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# Should have greater-than comparison (sgt = signed greater than)
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assert "sgt" in llvm_ir or ">" in llvm_ir
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